JMF667H    
High Performance SSD Controller (4 Channels with DRAM)

product brief

Overview
     JMF667H is a single chip, supports external DDR3 DRAM, SATA III to NAND flash interface. It is native design to provide higher bandwidth for flash memory access.
    JMF667H can support the maximum read and write speed to drive the limit of flash memory. JMF667H has the best supporting to the latest NAND flash memory, including Toshiba 32nm/24nm HBL/ABL, 19nm Flash, Intel/Micron 20 nm and 25 nm. It also provides the embedded hardware error correction code (ECC), wear leveling, and bad block management technology in this chip. In order to resolve compatibility issue, JMF667H provides the on line firmware upgrade ability.
    JMF667H provides embedded processor, internal masked ROM, data SRAM, SATA link/transport layer, SATA PHY. Data swap between different interfaces can be done very efficiency by DMA without CPU involvement. Based on the efficient architecture, the JMF667H can provide the best performance.

 

Feature
SATA
• Compliant with Serial ATA International Organization: Serial ATA Revision 3.1.
• Supports 1-port 1.5/3.0/6.0Gbps SATA I/II/III interface.
• Support ATA-8 Command Setmmand Set.

 

CPU
• 32bits Embedded processor - ARM9 base Instruction Set.
• 32 KBytes Embedded masked program ROM.
• 192 KBytes Embedded system RAM with ITCM.

 

FLASH
• Support maximum 8CE's Flash per channel.
• Support Toshiba/Sandisk 32/24/19 nm Flash.
• Support IM 25/20 nm Flash.
• Support legacy/toggle 1.0/toggle 2.0 mode Flash
• Enhanced endurance by dynamic/static wear-leveling.
• Supports 4K/8K/16K bytes page size.
• Supports dynamic power management.
• SMART (Self-Monitoring, Analysis and Reporting Technology).
• Data integrity under power-cycling.
• Supports BCH 8/16/24/40 bits ECC.
• Support Shift read feature of NAND flash when ECC fail

 

SDRAM
• Support one module DDR3
• Support up-to 4Gbits

 

SYSTEM
• Integrated SATA III port and 4-channels Flash controller.
• LED indicator for SATA read/write access.(optional)
• LED indicator for SATA PHY link up.(optional)
• Provides 22 GPIO pins for customer.
• Provides UART and JTAG for S/W debugging.
• Built-in power-up self-test (BIST).
• Manual and automatic self-diagnostics.
• Provides voltage low detect interrupt.
• 288-ball TFBGA package

 

Firmware
• Support online SATA fimware update.
• Support 1/2/4/8 banks selected free.
• Support 1/2/3/4 channels selected free.

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